EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
Forbes

RISC-V’s Ascent Could Reshape The Global Compute Landscape

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...
Electronic Design

RISC-V RVA23—A Major Milestone

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...
CoinTelegraph

What is RISC-V, and why does Vitalik Buterin want it for Ethereum smart contracts?

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...
csis.org

What RISC-V Means for the Future of Chip Development

Many believe that the future of chip design—and the development of new technologies like next-generation artificial intelligence (AI)—will depend on RISC-V architecture. RISC-V is an open standard ...
Electronic Design

Embracing Multicore and RISC-V Architectures in SoC Design

There’s been a significant shift toward RISC-V architectures in SoC design. This article highlights its impact on the semiconductor industry and role in fostering innovation and flexibility in ...
Ars Technica

SilverBench (Javascript/web benchmark... link in OP)

I saw this in a RISC-V video (the latest one from Explaining computers, it's linked by someone in the RISC-V thread). Similar to Kraken, it's a browser-based ray tracer written in Javascript. While it ...
Semiconductor Engineering

RISC-V’s Increasing Influence

The industry is increasingly talking about benefits brought by the RISC-V architecture, but is it even the right starting point? While it may not be perfect, it may provide the flexibility necessary ...
EDN

RISC-V basics: The truth about custom extensions

The era of universal processor architectures is giving way to workload-specific designs optimized for performance, power, and scalability. As data-centric applications in artificial intelligence (AI), ...
Semiconductor Engineering

Increasing Design Flexibility With RISC-V-Based Processor IP

The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley ...
SiliconANGLE

RISC-V chip startup AheadComputing raises $21.5M to fix CPU bottlenecks

The newly minted chipmaking startup AheadComputing Inc. said today it has raised $21.5 million in seed funding to develop and commercialize a new artificial intelligence chipset based on the ...
Hackaday

Google Removes RISC-V Support From Android

Last year the introduction of RISC-V support to the Android-specific, Linux-derived Android Common Kernel (ACK) made it seem that before long Android devices might be using SoCs based around the ...