Bolt Graphics is pressing ahead with its plan to challenge Nvidia and AMD by building a graphics processor around a RISC-V ...
SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste ...
Unlike previous prototypes, which were limited to embedded or experimental use, the Titan targets mainstream usability. Its ...
Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...
A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...
I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP ...
The RISC-V architecture is inexorably inching from its theoretical origins towards the mainstream, as what could once only be done on an exotic FPGA can now be seen in a few microcontrollers as well ...
SiFive Inc., a computer chip startup that’s developing processor technology based on the open-source RISC-V instruction set architecture, said today it has raised a hefty $175 million in a late-stage ...
RISC-V is, like x86 and ARM, an instruction set architecture (ISA). Unlike x86 and ARM, it is a free and open standard that anyone can use without getting locked into someone else's processor designs ...
RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...
The ESP32-P4 is the new hotness on the microcontroller market. With RISC-V architecture and two cores running 400 MHz, to ...