EDN

Transaction-level models eyed as SoC enabler

Munich, Germany – Transaction-level modeling got a hard look at the recent Design Automation and Test in Europe (DATE) conference here as a possible answer to some of the design and verification ...
Design-Reuse

Advancing Transaction Level Modeling -- Linking the OSCI and OCP-IP Worlds at Transaction Level

James A. Colgan, Strategic Alliances Director, Sonics Inc. Pete Hardee, Director of Services and Strategic Marketing, CoWare, Inc. Abstract: The growing need for Transaction Level Modeling (TLM) ...
Design-Reuse

Transaction Level Model of IEEE 1394 Serial Bus Link Layer Controller IP Core and its Use in the Software Driver Development

The paper describes a transaction level model of IEEE STD 1394a-2000 [1] link layer controller IP core and its use in the development of a software stack supporting this controller. Purpose of the ...
EDN

Transaction models offer new deal forEDA

After years of working at the register-transfer level, chip designers and verification engineers are warming up to a new approach that may represent the next step up in abstraction. But it's not a ...
Electronic Design

Transaction-Level Models Are Becoming Easier To Use

Transaction-level modeling (TLM) verification methodologies are propagating down from power users, such as large systems houses and integrated device manufacturers, to the broader design community. As ...